Intel® Architecture Instruction Set Extensions Programming Reference (PDF reference). The description of new instructions in the upcoming Haswell processor, including transactional memory support, hardware random number generator, and 256-bit vector integer operations. The transactional memory instructions should be useful for GIL (global interpreter lock) in Python and Ruby. They tried to eliminate it with software TM, but it was too slow.
FWIW, here is an implementation that prevents crossing MMU pages using SSE instructions. String addresses are passed in RSI and RDI.
; String comparison using pcmpistri instruction
; and computing string lengths ahead of time...
"F14 is a 14-way probing hash table that resolves collisions by double hashing. Up to 14 keys are stored in a chunk at a single hash table position...
A ternary structure for storing dictionaries is proposed. The structure is based on ternary search trie that is "compressed" into a DAG by linking together equal subtrees. By using it, you can eliminate affix stripping and implement a faster spelling corrector.